| Cenon (V) | | Vector graphics / CAD / DTP program |
| MyHDL-gplcver | | GPL Cver cosimulation support for py-MyHDL |
| MyHDL-iverilog | | Icarus Verilog cosimulation support for py-MyHDL |
| adms | | Compact device model code generator for SPICE |
| atlc | | Calculates the impedance of arbitrary cross section transmission lines |
| boolean | | GDSII viewer/editor + (boolean) operations on sets of 2d polygons |
| cascade | | Simple tool to analyze noise and distortion of a RF system |
| cgi-wcalc | | CGI Based Transmission Line Analysis/Synthesis Calculator |
| covered | | Verilog code coverage analyzer (stable release version) |
| covered-current | | Verilog code coverage analyzer (development snapshot) |
| dinotrace | | Tool for viewing the output of digital simulators |
| dinotrace-mode | | Emacs major mode for dinotrace |
| eagle | | Easy to use printed circuit board editor |
| electric | | Electrical CAD system |
| fastcap | | Fast 3-D capacitance solver |
| fasthenry | | Three-dimensional inductance extraction program |
| felt | | Free system for introductory level finite element analysis |
| freehdl | | VHDL simulator |
| gdsreader | | GDS-II stream file to Postscript and HP/GL converter |
| geda | | Toolset for automating electronic design |
| gerbv | | Gerber file viewer |
| gnetman | | Advanced Netlister and Netlist Manipulation Database for gEDA |
| gnucap | | General purpose circuit simulator |
| gplcver | | Verilog simulator |
| gsmc | | Smith charting program |
| gtk1-wcalc | | GTK Based Transmission Line Analysis/Synthesis Calculator |
| gtk2-wcalc | | GTK2 Based Transmission Line Analysis/Synthesis Calculator |
| gtkwave | | Electronic waveform viewer |
| gwave | | Viewer for spice-like simulator output and other analog data |
| lc | | Finite Difference Time Domain (FDTD) Electromagnetic Simulator |
| librecad | | Free Open Source personal CAD application |
| libwcalc | | Library for Transmission Line Analysis/Synthesis |
| magic | | Integrated circuit layout system |
| mcalc | | JavaScript based microstrip analysis/synthesis calculator |
| mex-wcalc | | Matlab Based Transmission Line Analysis/Synthesis Calculator |
| mpac | | Microstrip Patch Antenna Calculator |
| nelma | | Circuit board capacitance extraction tool |
| ng-spice | | Next generation circuit simulation program |
| ntesla | | Tesla coil design program |
| oct-wcalc | | Octave Based Transmission Line Analysis/Synthesis Calculator |
| openscad | | OpenSCAD - The Programmers Solid 3D CAD Modeller |
| pcb | | Printed circuit board layout system |
| py-MyHDL | | Hardware description in Python |
| py-simpy | | Discrete event simulation framework |
| qcad | | 2D CAD system |
| qcad-manual-cs | | Online manual for QCad 2D CAD package, Czech |
| qcad-manual-de | | Online manual for QCad 2D CAD package, German |
| qcad-manual-en | | Online manual for QCad 2D CAD package, English |
| qcad-manual-hu | | Online manual for QCad 2D CAD package, Hungarian |
| qcad-partlibrary | | About 4500 mech, elec, etc. parts for the QCad 2D CAD system |
| sci-wcalc | | Scilab Based Transmission Line Analysis/Synthesis Calculator |
| spice | | General-purpose circuit simulation program |
| spiceprm | | Spice preprocessor for parameterized subcircuits |
| stdio-wcalc | | Stdio Based Transmission Line Analysis/Synthesis Calculator |
| tkgate | | Tcl/Tk based digital circuit editor and simulator |
| tnt-mmtl | | Multilayer Multiconductor Transmission Line 2-D and 2.5-D simulator |
| transcalc | | Transmission line analysis/synthesis |
| verilog | | Verilog simulation and synthesis tool (stable release version) |
| verilog-current | | Verilog simulation and synthesis tool (development snapshot version) |
| verilog-mode | | Verilog mode for Emacs |
| vipec | | Network analyser for electrical networks |
| wcalc | | Meta-pkg for the Wcalc Transmission Line Analysis/Synthesis Calculator |
| wcalc-docs | | Web Pages for the Wcalc Transmission Line Calculator |
| xchiplogo | | Program for generating pretty logos on VLSI chips |
| xcircuit | | Drawing program for X11 (especially for circuits) |