Subject: CVS commit: pkgsrc/cad/iverilog
From: Kamil Rytarowski
Date: 2016-10-09 01:01:46
Message id: 20161008230146.14DF2FBD2@cvs.NetBSD.org

Log Message:
Import iverilog (Icarus Verilog) 10.1.1 as cad/iverilog

It's a rename of cad/verilog to a better name.

Updated DESCR for new package:

Icarus Verilog is intended to compile ALL of the Verilog HDL as described in
the IEEE-1364 standard. Of course, it's not quite there yet. It does currently
handle a mix of structural and behavioral constructs.

Icarus Verilog is not aimed at being a simulator in the traditional sense, but
a compiler that generates code employed by back-end tools.

No objections to rename from <gdt>

Files:
RevisionActionfile
1.1addpkgsrc/cad/iverilog/DESCR
1.1addpkgsrc/cad/iverilog/Makefile
1.1addpkgsrc/cad/iverilog/PLIST
1.1addpkgsrc/cad/iverilog/buildlink3.mk
1.1addpkgsrc/cad/iverilog/distinfo
1.1addpkgsrc/cad/iverilog/patches/patch-aa
1.1addpkgsrc/cad/iverilog/patches/patch-ad
1.1addpkgsrc/cad/iverilog/patches/patch-cadpli_Makefile