./wip/adms, Verilog to C code compiler

[ CVSweb ] [ Homepage ] [ RSS ] [ Required by ] [ Add to tracker ]

Branch: CURRENT, Version: 2.2.8, Package name: adms-2.2.8, Maintainer: 10.50

Adms is a code generator that converts electrical compact device models
specified in high-level description language into ready-to-compile c code for
the API of spice simulators. Based on transformations specified in xml language
adms transforms Verilog-AMS code into other target languages.


Required to run:
[devel/libf2c]

Required to build:
[lang/f2c] [devel/gmake] [devel/autoconf] [devel/libtool-base] [devel/automake] [devel/bison]

Master sites:

SHA1: 9887e16321bdec9e178519ecc55cd3178dd68c60
RMD160: 03367e683ae84c75b83645c7a4973b4e654daf8b
Filesize: 678.194 KB

Version history: (Expand)

CVS history: (Expand)


   2010-08-01 16:57:08 by Aleksej Saushev | Files touched by this commit (36) 
Log message:
Assume anything that wants Fortran for now actually wants Fortran-77.
   2008-05-24 17:34:08 by Tobias Nygren | Files touched by this commit (146) 
Log message:
This commit brought to you by the automated whitespace police (pkglint)
   2008-03-08 21:07:58 by Adam Hoka | Files touched by this commit (3) 
Log message:
Fix bison issue on build
   2008-02-23 14:00:35 by Bloðøx | Files touched by this commit (1) 
Log message:
   2008-02-23 13:48:37 by Bloðøx | Files touched by this commit (4) | Imported package
Log message: