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NOTICE: This package has been removed from pkgsrc./
lang/iverilog,
Verilog simulation and synthesis tool
Branch: CURRENT,
Version: 10.1,
Package name: iverilog-10.1,
Maintainer: pkgsrc-usersIcarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard.
Required to build:[
devel/gperf]
Master sites:
SHA1: 5aeabe8553bd42d5788f4ebba995c37b4bd966bc
RMD160: 90ae1db06dc309ce7afb94f75434e57c58a02596
Filesize: 1548.988 KB
Version history: (Expand)
- (2016-10-12) Package deleted from pkgsrc
- (2016-10-05) Updated to version: iverilog-10.1
- (2016-01-23) Package has been reborn
- (2016-01-21) Package deleted from pkgsrc
- (2015-11-29) Package added to pkgsrc.se, version iverilog-10.0 (created)