Log message:
Remove @dirrm entries from PLISTs

Log message:
Recursive ABI depends update and PKGREVISION bump for readline-6.0 shlib
major change.

Reported by Robert Elz in PR 41345.

Log message:
Simply and speed up buildlink3.mk files and processing.
This changes the buildlink3.mk files to use an include guard for the
recursive include. The use of BUILDLINK_DEPTH, BUILDLINK_DEPENDS,
BUILDLINK_PACKAGES and BUILDLINK_ORDER is handled by a single new
variable BUILDLINK_TREE. Each buildlink3.mk file adds a pair of
enter/exit marker, which can be used to reconstruct the tree and
to determine first level includes. Avoiding := for large variables
(BUILDLINK_ORDER) speeds up parse time as += has linear complexity.
The include guard reduces system time by avoiding reading files over and
over again. For complex packages this reduces both %user and %sys time to
half of the former time.

Log message:
update to verilog-current-20070227

Release Notes for Icarus Verilog Snapshot 20070227

* Fix some problems with specify block parsing. Detect some cases that
  are parsed but not properly implemented yet and issue warnings or
  errors. Also fixed a few problems with inertial delay model timing.

* Detect is some cases Verilog source errors that can be better
  reported to users. This includes more specific error messages for
  certain syntax errors.

* Fix problems with overridden continuous assignments.

* Hide bool types from logic type as far as VPI is concerned, for the
  sake of compatibility.

* Fix a variety of code generator expression lifetime bugs that caused
  obscure (and wrong) output results in behavioral code.

* iverilog-vpi uses the compiler selected at build time.

* Rework handling of strings to handle escape sequences properly.

* Fix some handling of real values in some expression types.

* Get padding of sized, unsigned numbers when x or z are involved.

* Many, many more misc. bug fixes.

* Add an assert mechinism that improves usefulness of bug reports by
  reporting source file line numbers when available.

* Compile fixes, using inttypes.h instead of stdint for portability.

* Various spelling fixes.

Log message:
Update to verilog-current-20070123

Release Note for Icarus Verilog Snapshot 20070123

Handling of arrays has been rewritten to allow support for net
arrays. This caused ivl_target API changes, as well as elaboration and
vvp run time changes. There may be bits of the old method lingering in
the source code.

Improve support for constant power (**) expressions, and other
constant exppressions that are passed to functions/tasks.

Improve elaboration of for-loop increment expressions. There were some
bugs there that are not fixed.

Fix argument width calculations for shift operations.

Constant ector expressions can have real constants. Handle this at run
time where needed.

Fix some bad lookaside optimizations for assignments to l-value part
selects.

Log message:
update to verilog-current-20061009

* Release Notes for Icarus Verilog Snapshot 20061009

The Big news is support for delay path timing is specify blocks. This
includes delay paths and specparams. Back annotation of specify path
timings are not yet implemented.

The "-g" flag has been made a bit more general so that individual
compiler features can be turned on/off. This for example allows for
turning off specify block support and Icarus Verilog extensions, as
well as select language generation.

A variety of bug fixes have been included.
- Missing symbols on Windows fixed.
- mingw build instructions reworked.
- Fix internal handling of -D__ICARUS__ define
- Fix crash of driver when -M flag is used.
- Fix configure detection of host in some subdirectories.
- Handle non-constant delays of index non-blocking assignments.
- $scanf support for real values.
- Fix scheduling of RWsync vs. ROSync callbacks.
- Fix vpi_put_userdata return value.

The iverilog-vpi command now allows .cpp files to stand for C++
source.

Log message:
Update to 20060809 snapshot.  There have been several changes since the
last packaged snapshot.  Those are:

--------------------------------------------------
Release Notes for Icarus Verilog Snapshot 20060215
--------------------------------------------------

* Part select of memory words should now work according to
  Verilog-2001. This also led to some cleanup of the handling of types
  internally, as well as some infrastructure for general arrays.

* Minor fix to parsing of (* *) attributes.

* Fix rounding of reals to integers.

* Clean up some of the vvp engine related to memories. Remove some
  dead instructions.

--------------------------------------------------
Release Notes for Icarus Verilog Snapshot 20060409
--------------------------------------------------

the most substantial difference in this snapshot the first signs of
generate support. The compiler now supports generate loops and has
been tested with examples that include wires and gates within the
generate scheme. The regression test suite has very few generate
tests, so any concise self-testing test programs that use generate
would be helpful.

Also, instance arrays that use overridden parameters now work
properly.

Task arguments are a bit more flexible in order to support vendor
(notably Xilinx) models that use more interesting task arguments.

Runtime support for bi-directional ports had some bugs fixed, along
with some other minor run-time bugs. Also, the runtime gains support
for typed parameters. And also, there are some new runtime callbacks
for events and memories.

Parameters had a few types related bugs fixed. They are a bit more
flexible now.

And various minor compilation errors have been fixed. This includes
C/C++ compilation errors fixes, and some configure/Makefile tweaks.

--------------------------------------------------
Release Notes for Icarus Verilog Snapshot 20060618
--------------------------------------------------

Add support for system functions in continuous assignments.

Allow concatenations as arguments to inout ports. This comes with a
small variety of internal part select and concatenation bug fixes.

Fix some bugs in constant propagation through ternary expressions.
Fix broken subtraction if small constants in certain cases.
Fix a few datatype mismatch errors.

Make $readmem give warning when input is inadequate for requested
range.

Fix runtime of nand in continuous assignments.

Fix synchronous user defined primiteves to only follow edges.

Fix a runtime error in some thread delays processing.

Improve limited genvar expression handling.

Start a rework of expression elaboration. Make elaboration aware of
the expression context width when appropriate in order to better
handle expression width and padding.

Fix the make rules for parse.cc to reflect that they come from the
same source. Fix the autoconf.sh to configure the stub target.

Fix portability of the lexor source files on Windows systems. Get rid
of the isatty references.

Make a stub lround when the system version is missing.

--------------------------------------------------
* Release Notes for Snapshot 20060809
--------------------------------------------------

Some handling of real values is improved. Real valued literals are
handled in net contexts (continuous assignment, etc.). Also, modulus
of real operands now works. (This is an extension to the Verilog
standard.)

The power operator (**) now works.

Signed right shift works properly now.

The $sscanf and $fscanf are introduced, and work at least for basic
numeric values.

The release function now works to undo general force statements, and
not just contant force statements.

Delay constants up to 64 bits are supported. This at first doesn't
seem like an issue, but when precisions are mixed, it becomes
surprisingly easy to overflow 32bit delays.

The driver is reworked to pass many preprocessor details through a
temporary file instead of on the command line of a system(3)
call. This prevents confusing and incorrect shell processing of
complex strings passed as values to -D flags.

Various other little fixes.

Log message:
Change the format of BUILDLINK_ORDER to contain depth information as well,
and add a new helper target and script, "show-buildlink3", that outputs
a listing of the buildlink3.mk files included as well as the depth at
which they are included.

For example, "make show-buildlink3" in fonts/Xft2 displays:

	zlib
	fontconfig
	    iconv
	    zlib
	    freetype2
	    expat
	freetype2
	Xrender
	    renderproto

Log message:
Track information in a new variable BUILDLINK_ORDER that informs us
of the order in which buildlink3.mk files are (recursively) included
by a package Makefile.

Log message:
Aligned the last line of the buildlink3.mk files with the first line, so
that they look nicer.