Log message:
math/fftwf: gone, merged into math/fftw

Log message:
fftw*: update to 3.3.9

FFTW 3.3.9:

* New API fftw_planner_nthreads() returns the number of threads
  currently being used by the planner.

* Fix incorrect math in 128-bit generic SIMD

* Fix wisdom for avx512.

  The avx512 alignment requirement was set to 64 bytes, but this is
  wrong.  Alignment requirements are a property of the platform (e.g.,
  x86) and not of the instruction set (e.g., AVX).  Among other
  things, this broke wisdom with avx512.

  Note that avx512 support is still experimental because the FFTW
  authors have no avx512 hardware available for testing.

* fftw_threads_set_callback function to change the threading backend at runtime.

Log message:
*: bump PKGREVISION for perl-5.32.

Log message:
Bump PKGREVISIONs for perl 5.30.0

Log message:
fftwf: updated to 3.3.8

Sync with fftw
Add Makefile.common

Log message:
Recursive bump for perl5-5.28.0

Log message:
Updated fftwf to 3.3.6pl1.

FFTW 3.3.6-pl1:

* Bugfix: FFTW 3.3.6 had the wrong libtool version number, and generated
  shared libraries of the form libfftw3.so.2.6.6 instead of
  libfftw3.so.3.*.

FFTW 3.3.6:

* The fftw_make_planner_thread_safe() API introduced in 3.3.5 didn't
  work, and this 3.3.6 fixes it.  Sorry about that.
* compilation fixes for IBM XLC
* compilation fixes for threads on Windows
* fix SIMD autodetection on amd64 when (_MSC_VER > 1500)

Log message:
Convert all occurrences (353 by my count) of

	MASTER_SITES= 	site1 \
			site2

style continuation lines to be simple repeated

	MASTER_SITES+= site1
	MASTER_SITES+= site2

lines. As previewed on tech-pkg. With thanks to rillig for fixing pkglint
accordingly.

Log message:
Update fftw{,f} to 3.3.5.

FFTW 3.3.5:

* New SIMD support:
  - Power8 VSX instructions in single and double precision.
    To use, add --enable-vsx to configure.
  - Support for AVX2 (256-bit FMA instructions).
    To use, add --enable-avx2 to configure.
  - Experimental support for AVX512 and KCVI. (--enable-avx512, --enable-kcvi)
    This code is expected to work but the FFTW maintainers do not have
    hardware to test it.
  - Support for AVX128/FMA (for some AMD machines) (--enable-avx128-fma)
  - Double precision Neon SIMD for aarch64.
    This code is expected to work but the FFTW maintainers do not have
    hardware to test it.
  - generic SIMD support using gcc vector intrinsics
* Add fftw_make_planner_thread_safe() API
* fix #18 (disable float128 for CUDACC)
* fix #19: missing Fortran interface for fftwq_alloc_real
* fix #21 (don't use float128 on Portland compilers, which pretend to be gcc)
* fix: Avoid segfaults due to double free in MPI transpose

* Special note for distribution maintainers: Although FFTW supports a
  zillion SIMD instruction sets, enabling them all at the same time is
  a bad idea, because it increases the planning time for minimal gain.
  We recommend that general-purpose x86 distributions only enable SSE2
  and perhaps AVX.  Users who care about the last ounce of performance
  should recompile FFTW themselves.

Log message:
Bump PKGREVISION for perl-5.24.0 for everything mentioning perl.