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Subject: CVS commit: pkgsrc/emulators/hatari
From: Adam Ciarcinski
Date: 2016-11-06 16:39:28
Message id: 20161106153928.6F319FBA6@cvs.NetBSD.org
Log Message:
Version 2.0.0 (2016-11-04)
---------------------------
Emulation:
- Machine:
- Support for MegaST & MegaSTE machines added
(this also replaces the Real Time Clock / RTC option, since this chip
is only available on the Mega machines)
- The general purpose registers of the TT SCU are now correctly emulated
(this fixes the problem with AHDI not finding any partitions during boot)
- HD:
- Fix: Disable GEMDOS opcodes after GEMDOS drive is disabled
- Fix: GEMDOS HD can now be initialized multiple times,
e.g. when running EmuTOS RAM image from a normal TOS
- Fix: WORD access to IDE data register at 0xf00002
- Fix: '*.*' pattern with GEMDOS HD should match also files
without extension
- Video:
- Full rewrite of the GLUE state machine, including support for the
4 wakeup states in STF mode, as well as more accurate video timings
(hbl, timer b, top/bottom and left/right removal, mixing 50/60/71 Hz
lines)
- Correctly shows the last 8 pixels for STE 224 byte overscan
- Fix: reading video counter $FF8205/07/09 after modifying it
while display is ON
- Fix: location of the video counter's restart when screen runs at 60 Hz
- TT: sync ST & TT color registers immediately on write, handle
palette bank setting correctly, fix duochrome colors
- Falcon: handle byte access special case for ST color registers
- Falcon: border color support also in HiColor
- better hbl/timer b interrupts when CPU runs at 16/32 MHz
- Sound:
- Special cases for STE DMA sound when start address = end address
- Increase STE DMA volume when compared to the YM2149 volume
- Greatly improve Falcon DMA sound
- CPU:
- use WinUAE CPU for STF/STE mode too, not just Falcon (old CPU core
is considered deprecated)
- improved IACK and simultaneous interrupts
- access IO regs on 2 cycle boundaries when possible
- More accurate 68060 mode (instructions from previous CPU versions
removed in 68060 aren't accepted/emulated anymore)
- Misc bus error / IO mem register handling fixes for TT & Falcon
(e.g. add TT DIP switch register handler)
- Blitter:
- Better bus arbitration when blitter is started
- Don't cause bus error when accessing regions causing CPU bus error
- Fixes to DSP addressing
- Floppy:
- Fix the value of the WPT bit when inserting/ejecting a write protected
floppy
Files: