Log Message: update to verilog-current-20030202. This is the first packaged (in pkgsrc) snapshot after the verilog-0.7 release. This snapshot adds preliminary support for real variables to the language to the features already found in verilog-0.7.
Revision | Action | file |
1.32 | modify | pkgsrc/cad/verilog-current/Makefile |
1.16 | modify | pkgsrc/cad/verilog-current/distinfo |
1.11 | modify | pkgsrc/cad/verilog-current/patches/patch-ad |