Log Message: The MVSIS group at Berkeley studies logic synthesis and verification for VLSI design. The main focus is on new optimization algorithms that improve the quality of circuits generated by automatic synthesis tools and, at the same time, are scalable for practical use.
Revision | Action | file |
1.1 | import | wip/mvsis/PLIST |
1.1 | import | wip/mvsis/Makefile |
1.1 | import | wip/mvsis/DESCR |
1.1 | import | wip/mvsis/distinfo |