./wip/mvsis, Logic synthesis and verification tool

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Branch: CURRENT, Version: 3.0, Package name: mvsis-3.0, Maintainer: dhowland

The MVSIS group at Berkeley studies logic synthesis and verification for VLSI
design. The main focus is on new optimization algorithms that improve the
quality of circuits generated by automatic synthesis tools and, at the same
time, are scalable for practical use.


Required to build:
[pkgtools/cwrappers]

Master sites:

RMD160: f95983505a21ea5b159d31393e928e32636bfc31
Filesize: 3592.028 KB

Version history: (Expand)

CVS history: (Expand)


   2012-10-03 16:57:08 by Aleksej Saushev | Files touched by this commit (1) 
Log message:
Support staged installation.
   2009-10-11 12:44:55 by Thomas Klausner | Files touched by this commit (222) 
Log message:
Remove obsolete @dirrm lines.
   2006-12-17 22:42:34 by David Howland | Files touched by this commit (2) 
Log message:
Compile on gcc4
   2006-12-04 07:40:00 by David Howland | Files touched by this commit (2) 
Log message:
Attempt to fix buik build failure
fix redefinition of a function
however, i dont have a -current machine to test this with
   2006-11-15 18:51:47 by David Howland | Files touched by this commit (4) | Imported package
Log message:
The MVSIS group at Berkeley studies logic synthesis and verification for VLSI
design. The main focus is on new optimization algorithms that improve the
quality of circuits generated by automatic synthesis tools and, at the same
time, are scalable for practical use.