./cad/verilog-mode, Verilog mode for Emacs

[ CVSweb ] [ Homepage ] [ RSS ] [ Required by ] [ Add to tracker ]

Branch: pkgsrc-2009Q1, Version: 3.60nb1, Package name: verilog-mode-3.60nb1, Maintainer: dmcmahill

This is a major mode for editing Verilog HDL source code under GNU Emacs or

Required to run:

Master sites: (Expand)

SHA1: 9fc378eda3cbe9d01beabd2ffa640d27064246f5
RMD160: 459554447a16418ef4aada81721514ccedb2612e
Filesize: 63.674 KB

Version history: (Expand)