Path to this page:
./
cad/py-PyRTL,
Register-transfer-level hardware design and simulation
Branch: CURRENT,
Version: 0.11.2,
Package name: py312-PyRTL-0.11.2,
Maintainer: ryoonPyRTL provides a collection of classes for pythonic register-transfer
level design, simulation, tracing, and testing suitable for teaching
and research. Simplicity, usability, clarity, and extensibility
rather than performance or optimization is the overarching goal.
Required to run:[
lang/py-six] [
lang/python310]
Master sites:
Filesize: 473.164 KB
Version history: (Expand)
- (2024-09-18) Updated to version: py312-PyRTL-0.11.2
- (2024-08-10) Updated to version: py311-PyRTL-0.11.2
- (2024-06-05) Updated to version: py311-PyRTL-0.11.1
- (2023-01-24) Updated to version: py310-PyRTL-0.10.2
- (2022-05-19) Updated to version: py39-PyRTL-0.10.1nb2
- (2022-01-05) Updated to version: py39-PyRTL-0.10.1nb1
CVS history: (Expand)