Path to this page:
./
devel/py-amaranth,
Toolchain for developing hardware based on synchronous digital logic
Branch: CURRENT,
Version: 0.5.3,
Package name: py312-amaranth-0.5.3,
Maintainer: jsThe Amaranth project provides an open-source toolchain for developing hardware
based on synchronous digital logic using the Python programming language, as
well as evaluation board definitions, a System on Chip toolkit, and more. It
aims to be easy to learn and use, reduce or eliminate common coding mistakes,
and simplify the design of complex hardware with reusable components.
The Amaranth toolchain consists of the Amaranth hardware definition language,
the standard library, the simulator, and the build system, covering all steps
of a typical FPGA development workflow. At the same time, it does not restrict
the designer's choice of tools: existing industry-standard (System)Verilog or
VHDL code can be integrated into an Amaranth-based design flow, or, conversely,
Amaranth code can be integrated into an existing Verilog-based design flow.
Master sites:
Filesize: 221.032 KB
Version history: (Expand)
- (2024-10-19) Updated to version: py312-amaranth-0.5.3
- (2024-09-16) Updated to version: py312-amaranth-0.5.2
- (2024-08-13) Updated to version: py312-amaranth-0.5.1
- (2024-08-10) Package added to pkgsrc.se, version py311-amaranth-0.5.1 (created)
CVS history: (Expand)
2024-10-19 18:34:14 by Adam Ciarcinski | Files touched by this commit (2) | |
Log message:
py-amaranth: updated to 0.5.3
0.5.3
rpc: add support for `wiring.Component`.
Do not infer the ports from the publicly accessible wires, but instead
delegate finding the ports to the `rtlil.convert` function.
|
2024-10-14 08:08:41 by Thomas Klausner | Files touched by this commit (21) |
Log message:
i*: clean up after python38 removal
|
2024-09-16 11:24:06 by Adam Ciarcinski | Files touched by this commit (2) | |
Log message:
py-amaranth: updated to 0.5.2
0.5.2
vendor._gowin: fix clock name quotes for Gowin IDE
Gowin IDE seems unhappy with quotes in clock signal names. For instance,
with the following SDC:
create_clock -name "clk50_0__io" -period 20.0 [get_ports
{clk50_0__io}]
Gowin IDE will complain with the following error message:
ERROR (TA2000) : "top.sdc":2 | 'syntax error' near token '-period'
Changing quotes with curly braces fixes the issue.
|
2024-08-13 21:47:30 by Thomas Klausner | Files touched by this commit (1) |
Log message:
py-amaranth: fix TOOL_DEPENDS
|